/*============================================================================*/
/*                        Tortoise Team			                              */
/*============================================================================*/
/*                        OBJECT SPECIFICATION                                */
/*============================================================================*
* C Include:        %MAL_EMIOS.h%
* Instance:         RPL_1
* %version:         1 %
* %created_by:      Andres Torres Garcia %
* %date_created:    Sunday May 20 13:41:01 2012 %
*=============================================================================*/
/* DESCRIPTION : Header file for uC Abstraction layer for Emios               */
/*============================================================================*/
/* FUNCTION COMMENT: Describes the prototypes functions uC Abstraction layer  */
/*	for Emios module											              */
/*                                                                            */
/*============================================================================*/
/*                               OBJECT HISTORY                               */
/*============================================================================*/
/*  REVISION |   DATE      |                               |      AUTHOR      */
/*----------------------------------------------------------------------------*/
/*  1.0      | 25/05/2012  | SAR/SIF/SCN_xxx               | Andres Torres    */
/*	1.1		 | 15/09/2012  |							   | Andres Torres    */
/* Integration under Continuus CM                                             */
/*============================================================================*/

#ifndef MAL_EMIOS_H                               /* To avoid double inclusion */
#define MAL_EMIOS_H

/* Includes */
/* -------- */
#include "stdtypedef.h"

/* Exported types and constants */
/* ---------------------------- */

/* Types definition */
/* typedef */

/*==================================================*/ 
/* Declaration of exported constants                */
/*==================================================*/ 
/* BYTE constants */

/* WORD constants */

/* LONG and STRUCTURE constants */


/*======================================================*/ 
/* Definition of RAM variables                          */
/*======================================================*/ 
/* BYTES */

/* WORDS */

/* LONGS and STRUCTURES */

/*======================================================*/ 
/* close variable declaration sections                  */
/*======================================================*/ 

/* Exported functions prototypes and macros */
/* ---------------------------------------- */

/* Functions prototypes */

/*! Stablish Duty Cicle in clock pulses for an Emios channel.
   \param ub_channel The PWM channel.
   \param uw_duty The duty cycle in us.
   \sa Version 
  */
extern void vfnSet_Duty_Opwm(T_UBYTE ub_channel, T_UWORD uw_duty);

/*! Define Emios 0 Channel as Opwm.
   \param a The channel.
   \param uw_a Value of register A in us. A match on comparator A sets the output flip-flop.
   \param uw_b	Value of register B in us. a match on comparator B clears it.
   \param ub_counterBus Select which counter bus is going to use as a period of time
   \sa Version 
  */
extern void vfnInit_Emios_0_Opwm(T_UBYTE ub_channel, T_UWORD uw_a, T_UWORD uw_b, T_UBYTE ub_counterBus);

/*! Define Emios 0 Channel as Modulus Counter.
   \param ub_channel The channel.
   \param uw_period The desired period in us.
   \sa Version 
  */
extern void vfnInit_Emios_0_Mcb(T_UBYTE ub_channel, T_UWORD uw_period);

/*!	Initializes all the channels in Emios 0. If System clock is 64 MHz, eMIOS0 clock will be 1 MHz.
*/
extern void vfnSetup_Emios_0(void);

/*! Init eMIOS channel as SAIC
   \param ub_channel The channel.
   \param ubPol The desired period in us.
   \param ub_counterBus The counter bus used.
   \sa Version 
  */
extern void vfnInit_Emios_0_Saic(T_UBYTE ubChannel, T_UBYTE ubPol, T_UBYTE ub_counterBus);

/*! Disable the interruption and CTU of the eMIOS channel
   \param ub_channel The channel.
   \sa Version 
  */
extern void vfnDisable_Int_Ctu(T_UBYTE ubChannel);

/*! Enable the interruption and CTU of the eMIOS channel
   \param ub_channel The channel.
   \sa Version 
  */
extern void vfnEnable_Int_Ctu(T_UBYTE ubChannel);

/*! Enable the flag for the CTU of the eMIOS channel
   \param ub_channel The channel.
   \sa Version 
  */
extern void vfnEnable_Ctu_Flag(T_UBYTE ubChannel);

/*! Disable the flag for the CTU of the eMIOS channel
   \param ub_channel The channel.
   \sa Version 
  */
extern void vfnDisable_Ctu_Flag(T_UBYTE ubChannel);

/* Functions macros */


/* Exported defines */

/*! \def EMIOS_CHAN_OUT                                                                                 
  Alternate function: Emios channel output                                                                             
 */
#define EMIOS_CHAN_OUT	0x0600

/*! \def EMIOS_CHAN_IN                                                                               
  Alternate function: Emios channel input                                                                              
 */
#define EMIOS_CHAN_IN	0x0500

/**
 * \defgroup Polarity Saic and Ipwm functions polarity parameters
 * @{
 */
#define RISING_EDGE 	0
#define FALLING_EDGE 	1

#define LOW				0
#define HIGH			1
/**@}*/
 
 
/**
 * \defgroup GPIO PCR for GPIO
 * @{
 */
#define GPIO_PIN_A0				0
#define GPIO_PIN_A1				1
#define GPIO_PIN_A2				2
#define GPIO_PIN_A3				3
#define GPIO_PIN_A4				4
#define GPIO_PIN_A5				5
#define GPIO_PIN_A6				6
#define GPIO_PIN_A7				7
#define GPIO_PIN_A8				8
#define GPIO_PIN_A9				9
#define GPIO_PIN_A10			10

#define GPIO_PIN_D0				48
#define GPIO_PIN_D1				49
#define GPIO_PIN_D2				50
#define GPIO_PIN_D3				51
#define GPIO_PIN_D4				52
#define GPIO_PIN_D5				53
#define GPIO_PIN_D6				54

#define GPIO_PIN_E0				64
#define GPIO_PIN_E1				65
#define GPIO_PIN_E2				66
#define GPIO_PIN_E3				67
#define GPIO_PIN_E4				68
#define GPIO_PIN_E5				69
#define GPIO_PIN_E6				70
#define GPIO_PIN_E7				71

#define GPIO_PIN_G10    		106
/**@}*/

/**
 * \defgroup Emios_Pin Pad Configuration Register value for Emios Channels
 * @{
 */
#define PCR_EMIOS_0_0		0  /*PA0*/
#define PCR_EMIOS_0_1		1  /*PA1*/
#define PCR_EMIOS_0_2		2  /*PA2*/
#define PCR_EMIOS_0_3		3  /*PA3*/

#define PCR_EMIOS_0_4		4  /*PA4*/

#define PCR_EMIOS_0_4_1		28  /*PB12*/

#define PCR_EMIOS_0_5		5  /*PA5*/

#define PCR_EMIOS_0_6		6  /*PA6*/
#define PCR_EMIOS_0_7		7  /*PA7*/

#define PCR_EMIOS_0_6_1		30 /*PB14*/
#define PCR_EMIOS_0_7_1		31 /*PB15*/

#define PCR_EMIOS_0_8		8  /*PA8*/
#define PCR_EMIOS_0_9		9  /*PA9*/
#define PCR_EMIOS_0_10		10 /*PA10*/
#define PCR_EMIOS_0_11		11 /*PA11*/
#define PCR_EMIOS_0_12		44 /*PC12*/
#define PCR_EMIOS_0_13		45 /*PC13*/
#define PCR_EMIOS_0_14		46 /*PC14*/
#define PCR_EMIOS_0_15		47 /*PC15*/

#define PCR_EMIOS_0_16		64 /*PE0*/
#define PCR_EMIOS_0_17		65 /*PE1*/
#define PCR_EMIOS_0_18		66 /*PE2*/
#define PCR_EMIOS_0_19		67 /*PE3*/
#define PCR_EMIOS_0_20		68 /*PE4*/
#define PCR_EMIOS_0_21		69 /*PE5*/
#define PCR_EMIOS_0_22		70 /*PE6*/
#define PCR_EMIOS_0_23		71 /*PE7*/
/**@}*/

/*!
  \def ENABLE_EMIOS_0()
  Enable the clock of eMIOS 0
*/
#define ENABLE_EMIOS_0()		(EMIOS_0.MCR.B.GPREN = 1)

#endif


